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  How To Build & Test an 11 Bit Barker PN Generator
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Originally Posted 8/7/97



This design generates the 11 Bit long Barker PN Code that is commonly used in IEEE 802.11 Wireless LANs.   The code can be generated or run either forwards or backwards, by using the REV pin control function.    A GAL or PAL 16V8A can be used to implement this logic with a pinout as shown below.    The following State Equations were used as input to MINC's PLDesignerXL software to generate a JEDEC file.    Please download the file below for complete device programming information and documentation, including a State Diagram in Word Perfect .wpd format.    See also the Fuse map / Jedec file listing shown below.


" E:\DESIGNSP\RANDY\BARKER11\BARKER11.SRC 
" DSL code created by Visual Software Solution's StateCAD Version 2.10g 
"  Tue Apr 09 10:45:58 1996

INPUT CLK;
INPUT REV;
INPUT SYNC;

OUTPUT Q0 CLOCKED_BY CLK;
OUTPUT Q1 CLOCKED_BY CLK;
OUTPUT Q2 CLOCKED_BY CLK;
OUTPUT Q3 CLOCKED_BY CLK;


OUTPUT START CLOCKED_BY CLK;


"State assignment
	"sreg=[Q0,Q1,Q2,Q3];

	"STARTUP=[0,0,0,0];
	"STATE0=[0,1,1,1];
	"STATE1=[0,0,1,1];
	"STATE2=[0,0,0,1];
	"STATE3=[1,0,0,0];
	"STATE4=[0,1,0,0];
	"STATE5=[0,0,1,0];
	"STATE6=[1,0,0,1];
	"STATE7=[1,1,0,0];
	"STATE8=[1,0,1,0];
	"STATE9=[1,1,0,1];
	"STATE10=[1,1,1,0];


Q0 =  /SYNC * REV * /Q3 * /Q2 * Q1 + /SYNC * /REV * Q3 * /Q2 * /Q1 + /SYNC * 
	/Q3 * Q2 * /Q1 * Q0 + /SYNC * /Q3 * /Q2 * Q1 * Q0 + /SYNC * REV * /Q2 * Q1 * 
	Q0 + /SYNC * /REV * /Q3 * Q2 * /Q1 + /SYNC * REV * /Q3 * Q1 * Q0 + /SYNC * 
	REV * Q3 * Q2 * Q1 * /Q0 + /SYNC * /REV * Q3 * /Q2 * Q0 ;


Q1 =  /Q3 * /Q2 * /Q1 * /Q0 + REV * Q2 * /Q1 * /Q0 + SYNC + /REV * /Q3 * /Q2 
	* /Q1 + REV * /Q3 * /Q1 * /Q0 + /REV * /Q2 * /Q1 * Q0 + REV * /Q3 * Q2 * /Q1 
	+ /REV * /Q3 * Q2 * Q0 + /Q3 * Q2 * Q1 * Q0 + REV * Q3 * Q2 * /Q0 + /REV * Q3
	 * /Q2 * Q0 ;


Q2 =  /Q3 * /Q2 * /Q1 * /Q0 + REV * Q3 * /Q1 * /Q0 + SYNC + Q3 * Q2 * Q1 * /
	Q0 + REV * /Q2 * /Q1 * /Q0 + /REV * /Q3 * /Q2 * /Q0 + REV * Q3 * /Q2 * /Q1 + 
	/REV * /Q3 * Q1 * Q0 + REV * Q3 * /Q2 * Q0 + REV * Q3 * Q2 * /Q0 + /REV * /Q2
	 * Q1 * Q0 ;


Q3 =  /Q3 * /Q2 * /Q1 * /Q0 + REV * Q3 * /Q1 * /Q0 + SYNC + /REV * Q3 * Q2 * 
	/Q0 + REV * /Q2 * /Q1 * /Q0 + Q3 * Q2 * /Q1 * /Q0 + REV * /Q3 * /Q2 * /Q1 + /
	REV * /Q3 * /Q1 * /Q0 + REV * /Q3 * /Q2 * Q0 + /REV * /Q3 * Q2 * Q0 + /Q3 * 
	Q2 * Q1 * Q0 ;



"State assignment
	"sreg1=[START];

	"CODING=[0];
	"PNSTART=[1];


START =  REV * Q3 * Q2 * Q1 * /Q0 * /START + /REV * /Q3 * Q2 * Q1 * Q0 * /
	START ;

16V8A Fuse Map / Jedec File Contents (from file Barker11.j1 in the zip file):

.
File for: MINC PLDesigner-XL  Version 3.3F  File: E:\DESIGNSP\RANDY\BARKER11\BARKER11.MPF
Created on: Tue Apr 09 10:10:37 1996
Device: P16V8A
*
NOTE         Pin Assignments        *
NOTE     (CLK) : 1*
NOTE     (REV) : 2*
NOTE     (SYNC) : 3*
NOTE     (LOW-VALUE) : 11*
NOTE     Q2 : 12    *
NOTE     Q0 : 13    *
NOTE     Q1 : 14    *
NOTE     Q3 : 15    *
NOTE     START : 16    *
QP20*
QF2194*
F0*
L0000 00000000000000000000000000000000*
L0032 00000000000000000000000000000000*
L0064 00000000000000000000000000000000*
L0096 00000000000000000000000000000000*
L0128 00000000000000000000000000000000*
L0160 00000000000000000000000000000000*
L0192 00000000000000000000000000000000*
L0224 00000000000000000000000000000000*
L0256 00000000000000000000000000000000*
L0288 00000000000000000000000000000000*
L0320 00000000000000000000000000000000*
L0352 00000000000000000000000000000000*
L0384 00000000000000000000000000000000*
L0416 00000000000000000000000000000000*
L0448 00000000000000000000000000000000*
L0480 00000000000000000000000000000000*
L0512 00000000000000000000000000000000*
L0544 00000000000000000000000000000000*
L0576 00000000000000000000000000000000*
L0608 00000000000000000000000000000000*
L0640 00000000000000000000000000000000*
L0672 00000000000000000000000000000000*
L0704 00000000000000000000000000000000*
L0736 00000000000000000000000000000000*
L0768 10111111111111101110110111011101*
L0800 01111111111111101101110111101101*
L0832 00000000000000000000000000000000*
L0864 00000000000000000000000000000000*
L0896 00000000000000000000000000000000*
L0928 00000000000000000000000000000000*
L0960 00000000000000000000000000000000*
L0992 00000000000000000000000000000000*
L1024 10111011111111111111111111011110*
L1056 11111011111111111101111111011111*
L1088 11111011111111111110110111101111*
L1120 01111011111111111111110111101111*
L1152 01111011111111111110111011111101*
L1184 10111011111111111101111111111110*
L1216 00000000000000000000000000000000*
L1248 00000000000000000000000000000000*
L1280 11111111111111111110111111011101*
L1312 10111111111111111101111111011110*
L1344 01111111111111111110111011101111*
L1376 01111111111111111101111111101101*
L1408 10111111111111111110111011111110*
L1440 11110111111111111111111111111111*
L1472 00000000000000000000000000000000*
L1504 00000000000000000000000000000000*
L1536 11111011111111111111110111011110*
L1568 01111011111111111110111111011101*
L1600 01111011111111111101110111101101*
L1632 01111011111111111110110111111110*
L1664 10111011111111111110111011111101*
L1696 10111011111111111101111011111110*
L1728 00000000000000000000000000000000*
L1760 00000000000000000000000000000000*
L1792 11111011111111111110111011011111*
L1824 11111011111111111101111111011101*
L1856 11111011111111111101110111101110*
L1888 11111011111111111110111111101101*
L1920 01111011111111111110110111111111*
L1952 10111011111111111101111011111111*
L1984 00000000000000000000000000000000*
L2016 00000000000000000000000000000000*
L2048 11110110111111111111111111111111*
L2080 11111111111111111111111111111111*
L2112 11111111111000000000000000000000*
L2144 00000000110000001111110011111100*
L2176 111111001111110001*
C6072*
.62ED

Download MINC PLDesigner-XL PAL / GAL Design Files


.............................................................. Device Pinout: ..............................................................

                            Device  1 - P16V8A
                          --------\___/--------
                          |                   |
                  CLK  1 [| CLK           Vcc |] 20  
                          |                   |
                  REV  2 [| Input       Biput |] 19  
                          |                   |
                 SYNC  3 [| Input       Biput |] 18  
                          |                   |
                       4 [| Input       Biput |] 17  
                          |                   |
                       5 [| Input       Biput |] 16 START
                          |                   |
                       6 [| Input       Biput |] 15 Q3
                          |                   |
                       7 [| Input       Biput |] 14 Q1
                          |                   |
                       8 [| Input       Biput |] 13 Q0
                          |                   |
                       9 [| Input       Biput |] 12 Q2
                          |                   |
                      10 [| GND            OE |] 11 LOW-VALUE
                          |                   |
                          ----------------------

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